#2347 [Bug/Enhancement] NVFP4 fails on launch with AVX2-only CPUs on official v0.1.44 / v0.1.44.1

本文

### Summary
In the official v0.1.44 / v0.1.44.1 releases, NVFP4 pack support was merged into the main tree (`sergiywith`'s port of `strata-nvfp4`). While the automated `setup` script conceals NVFP4 options on CPUs lacking AVX-512/VNNI, manual configurations on AVX2-only CPUs fail at startup with an immediate hard exit.

Even when paired with an RTX 50 series card (Blackwell with native FP4 Tensor Cores `sm_120`), the engine refuses to start.

### Environment
- **OS**: Windows 10 Pro x64 (Build 19045)
- **CPU**: AMD Ryzen 5 5600 (Zen 3 / AVX2, FMA, F16C — no AVX-512 / no AVX-VNNI)
- **RAM**: 96 GB DDR4 (Large Pages enabled, static commit headroom configured)
- **GPU**: NVIDIA GeForce RTX 5060 Ti 16GB (Blackwell SM 10.0 / CC 13.3)
- **Strata Version**: v0.1.44.1 official Windows x64 binary (also reproduced on v0.1.44)
- **Model**: `Maximilian228/Qwen3.8-Flash-Next-NVFP4-GPTQ-Strata`

### Engine Log Output (from v0.1.44.1)
```text
loading the model (the first start takes a minute or two) ...
[strata] starting the engine: reading the model's weights ...
EngineDied: the engine exited before it was ready (see strata-nvfp4.log)
the engine process ended: exit code 1
the engine log's last lines:
  [strata] 2026-10-14 03:18:19 engine started: C:\ai\strata\strata.exe --serve --pack C:/ai/Strata-data/packs/qwen-nvfp4-gptq --native C:/ai/Strata-data/packs/qwen-nvfp4-gptq/qwen-nvfp4-gptq-dense.gguf --ple-gguf C:/ai/Strata-data/packs/qwen-nvfp4-gptq/ple-fp8.gguf --expert-profile data/expert-profile-nvfp4.bin --expert-profile-save data/expert-profile-nvfp4.bin --expert-cache 4608 --prefill auto --adapt-async 1 --spec 4 --spec-min-p 0.5 --mtp mtp/rt --max-context 524288 --kv q4_0 --kv-resident 32768
  strata generate: memory guard: limit 95.9 GiB (source: meminfo), current 16.7 GiB, reclaimable cache credited 0.0 GiB; available 79.2 GiB (MemAvailable 79.2 GiB), floor 2560 MiB
  strata: this CPU cannot run the expert kernel: missing AVX512F AVX512BW AVX512VL AVX512-VNNI AVX512-VBMI.
          The engine needs AVX512-VNNI and AVX512-VBMI (Intel Ice Lake / AMD Zen 4 or newer).
          The scalar fallback exists for tests only and is far too slow to decode with.
```

### Questions & Enhancement Proposals

1. **GPU DMA Streaming Bypass (Pure GPU Misses):**
   Since Blackwell GPUs (RTX 50) have native FP4 MMA Tensor Cores (`sm_120`), is it possible to bypass the host CPU AVX-512 requirement entirely when the user specifies full GPU offload / DMA streaming (e.g. `--pcie-frac 1.0` or when all misses are routed over PCIe DMA rather than evaluated on the CPU)?

2. **AVX2 Host Dispatch:**
   The v0.1.44.1 release notes explicitly note that *"the NVFP4 AVX2 rows still match ggml bit for bit"*. Is the 256-bit AVX2 host kernel already implemented, but blocked by the startup check when a pack lacks `native_experts.txt`? If so, could the engine allow falling back to the AVX2 path on Zen 1–3 and 10th/11th Gen Intel instead of hard-exiting?