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AMD / HIP
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Issues
- #1495 [Feature]: experimental per-stage KV-grow for a two-GPU layer split at native 262K
- #1488 prefill.cpp: a GCC 10 build fails (std::atomic::wait is a GCC 11 library feature, with no guard and no documented minimum)
- #1484 [SYCL] 2x Arc Pro B70 + UD-IQ4_XS: the port's default expert kernels give corrupted output (silent wrong answers); STRATA_EXPERT_SPLIT=1 restores it
- #1479 HIP: STRATA_HEAD_MIX_MULTI / STRATA_ONE_TOKEN_COMMIT are hard-off; as opt-ins head-mix is exact and +0.4% decode on R9700 (patch inside)
- #1478 gfx1201 (R9700): the gfx1151 prompt switches in arch_defaults.cpp are exact and +4-8% prompt; suggest a gfx12 entry (decode half is slower)
- #1475 expert_cache_segmented_test fails on HIP builds instead of skipping (--vram-elastic is CUDA-only)
- #1474 hip_q2_zero fails on gfx1201 (R9700) with ROCm 7.10: Q2_0 signed-zero fix e9a5f8d is gated to gfx1012 / HIP < 7
- #1470 Pascal (sm_61): decode halves since 0.1.40.2. 2e4ddf6 drops `__restrict__` and peels the MMVQ loop on every CUDA arch
- #1463 MI50 32 GB (gfx906) on 0.1.40.1: 126K/252K needles, a 16 GB-limit run, temperatures (results)
- #1440 [Bug]: [SYCL] 0.1.40.2 on 2x Arc Pro B70: --layer-split fails three ways (#1054's fix from #1111 is not in main, plus two new split regressions)
- #1431 Feature request: tool-call emission recovery for low-bit quants in agent workloads (Qwen3.8-Flash-Next GSQ-RCO IQ3_XXS)
- #1425 [Windows, RTX 5090 32 GB, NVFP4 fork] ple: --ple-io direct streams the n-gram table at ~34 MB/s while the SSD does 1.4 GB/s - fresh long prompts prefill ~5x slow; cold passes can trip the #29 watchdog
- #1423 Support for AMD Radeon 780M, Phoenix , gfx1103
- #1410 Support Intel Arc Pro B50 (Xe2 / BMG-G21) as a tested SYCL target — 16 GB at 70 W is the card users are actually buying
- #1407 [gfx1200, 2x RX 9060 XT layer split] prompt-read stalls (watchdog #29 aborts) + run-to-run prefill degradation: fresh prompts slow 3-4x mid-run, file tier re-reads 24-35 GB per request
- #1393 Support for AMD Radeon 890M APU
- #1389 RX 7900 XTX (gfx1100): 925 -> 2,503 tok/s prompt read (+171%) - the method, and the 26% cliff below full lend coverage
- #1386 2x RX 7900 XTX (gfx1100, layer split): STRATA_PF_GEMM is worth ~7% prefill and is off by default
- #1375 Strata on an RX 6600 XT (gfx1032, 8 GB) and a Xeon E5-2678 v3 with DDR3
- #1373 Windows, 2-GPU layer split: 0.1.40.2 decode is 20% below 0.1.39 across the board, and STRATA_MMVQ_IL is 15% of it
- #1366 [AMD/gfx1031/Windows] Self-built engine crashes with an access violation inside amdhip64_7.dll before any output
- #1356 Stream corruption with `STRATA_QFUSE=1` on GFX1151 when using `parallel: 2`
- #1353 stager-transient-regression
- #1348 Foresight: fetching MoE experts before they're needed — measured on 2× 3090 (update: prefetch path built and correct, no decode gain yet; data, tools, help wanted)
- #1302 0.1.40 SYCL port on 2x Arc Pro B65: expert-cache fill stalls (1-core spin + xe "Timedout job" + device coredump); 0.1.38-based engine works on the same card
- #1299 AMD vison encoder on Windows
- #1280 bench: community report, 2x RTX 3090 (Linux, Docker): 0.1.40 resident RAM mode on a split (#848) and --pipeline-windows (#859)
- #1277 HIP: fused IQ expert kernels via RDNA4 int8 WMMA (RX 9060 XT / gfx1200)
- #1275 Windows HIP: --prefill auto can pick a chunk whose VRAM borrow leaves too little for the verify captures — silent engine exit at serve init
- #1272 0.1.40: with the shared-expert stream fork off by default, decode on 2x RX 6900 XT (gfx1030, Linux) is 5-13% slower; STRATA_SH_STREAM=1 restores it, and the #884 stall does not come back with it
- #1267 gfx1151 (Strix Halo) gets the ROCm 7.10.0a20251120 wheels, not the 7.14.1 that docs/STRIX_HALO.md was measured on: the engine crashes on kernel 7.2.8, and prompts run at half speed
- #1261 461
- #1258 gfx1151 (Strix Halo) prompt: per-kernel profile of a 16K prompt (rocprofv3) - where would outside help be useful?
- #1254 [Optimization] Support CPPC / configurable core placement for host loop and expert pool
- #1236 Will zero-copy be implemented on Strix Halo?
- #1233 ``` Windows + Strix Halo (gfx1151, Radeon 8060S): UD-IQ4_XS runs end-to-end — decode flat 29.5-30.4 tok/s at 1K-32K, but a GPU driver timeout (TDR) during a cold 32K prefill ```
- #1217 gfx1150 (Radeon 890M / Strix Point) works: report and a one-line CMake patch
- #1212 Review: shared MTP head fix — sibling Q4 state omission and test configuration gaps
- #1208 HIP layer split / gfx1030: batched prompt path produces NaN logits (output "!!!!") unless STRATA_HIP_PROMPT_F16=1 and the gfx1030 card is the first stage
- #1203 AMD Radeon Pro V620 (gfx1030) - Dockerfile ???
- #1200 RTX 5060 Ti 16 GB / Windows / IQ3_S: 36–42 tok/s — tuning directions & method (local gate scan, large pages, PLE FP8)
- #1188 --kv k8v4 produces degenerate repetition when --kv-resident streams (0.1.40)
- #1180 STRATA_PF_FUSED on gfx1100: missing __syncthreads() in native_w11_kernel + waves_per_eu(8) wrong on clang 22 / ROCm 7.10
- #1165 Ship an MMQ-enabled engine build (or opt-in loading) for k-quant prompts: a full-RAM machine is GPU-bound on the FP16 dequant path
- #1155 [Windows / AMD] --vision cpu is still unreachable: hip_vision()'s WIN gate, find_vcvars()'s VS-18 range, and no encoder in the ready-made engine
- #1141 Windows AMD: prebuilt HIP zip running a model on a discrete card (Radeon AI PRO R9700, gfx1201)
- #1128 0.1.40 --kv-grow: a short request trims the K/V to 8192 cells and drops the conversation cache, so the next 128K+ continuation is re-read in full (20.9% of continuations, RTX 5090, IQ3_S)
- #1113 sycl: the v0.1.40.1 port does not build as shipped (3 compile errors, 12 undefined symbols)
- #1103 hip: gfx1030 (RX 6800 XT) intermittent verify timeouts (#267): ROCm 7.14 gfx103X wheels regression, fixed by 7.13
- #1071 vmm.cpp: the CUDA 12 engine does not build with a toolkit older than 12.5 (missing CUDART_VERSION guard)
- #1069 Tesla P100 (Pascal, sm_60) + RTX 2070 SUPER, Linux/Docker (CUDA 12.9), 32 GB RAM: Q2_0 low-RAM mode, about 30 tok/s decode on the P100 alone and 36-38 tok/s with the second card as a helper expert cache (benchmark.py)
- #1056 Prefill: Stager threads yield-spin while waiting. On Linux with --mmap-experts (DGX Spark / GB10), prompts are read ~10x slower; elsewhere ~20 cores are burned during prefill
- #1054 [SYCL / Intel Arc] 2x Arc Pro B70 --layer-split auto deadlocks at startup after the host-mirror fill
- #1053 A reply that ends inside `<think>` (no `</think>`) comes back empty with `finish_reason: "stop"`, and the agent stops — close the thinking and continue once
- #1018 [gfx906] gr_up_fast_kernel<GrMulti> aborts the engine with HSA_STATUS_ERROR_MEMORY_APERTURE_VIOLATION on long-context chats (intermittent; the non-fast path is stable)
- #1008 Title: 0.1.39 decode is ~15–23% slower than 0.1.38 on AMD (gfx1201/HIP, 2× R9700); prefill unchanged
- #990 MCP install planning rejects supported AMD CPU vision (and retains the old Windows HIP restriction)
- #980 Field report: local Qwen3.8-Flash-Next (Strata) as an agent building 3D scenes in Unreal Engine 5.8 via MCP — what broke, what fixed it, what is still missing
- #979 HIP: a gfx1201 hipBLASLt table for 1.2.1 (100201, ROCm 7.2.0) makes the prompt 6-17% slower than no table
- #975 setup.get_prebuilt_hip() zip-unpack branch returns None on Linux (tools/test_setup_amd.py)
- #967 Unsloth ud-q4_k_xl - no vision?
- #957 using omp, pi with strata bad results.
- #954 [BUG] 0.1.39: fused int8 prompt experts (STRATA_PF_FUSED=1) + #583 byte-budget ring → kernel hang, `prefill mmq: iota: unknown error` on sm_120 (RTX 5090, WSL2)
- #953 Windows AMD report: UD-IQ4_XS on RX 7900 XTX (gfx1100) works, 34-64 tok/s decode
- #942 AMD `gfx1102 / RX 7600 XT` - successful real model run on Strata 0.1.39
- #937 `[gfx1030] HSA_STATUS_ERROR_MEMORY_APERTURE_VIOLATION in gdn_step_commit_kernel after a few long fresh prefills`
- #932 Dual GPU support
- #929 `--batch` with `--layer-split` exits ("verify batch: layer 34 never rang") with a 3070 first and a P40 second; works with the P40 first (CUDA, v0.1.39)
- #925 Setup: show progress in the browser from the first second (status page with steps, speed and ETA)
- #922 RTX 5070 Ti 16GB / Windows / IQ3_S: calibration ~14 tok/s and ~9–10 tok/s in controlled runs
- #918 Windows: Radeon 8060S (gfx1151) builds, selftests and passes the HIP ctest on top of #895
- #915 Windows AMD report: RX 6800M (gfx1031, laptop) works with a self-built HIP engine — please add 0x73DF / gfx1031 to the Windows path
- #909 Proposal (docs only): a short "contributing a change or report" section for AGENTS.md, and a pinned list of test requests. Yes/no?
- #890 HIP: "parallel": 2 + --layer-split on 2x R9700 exits (code 1) after "captured the batch window over slots 0,1"
- #884 HIP gfx1030, 2x RX 6900 XT: verify hangs after a long prompt when MMQ prompt path, adaptive expert swaps and SDMA meet (any one off avoids it)
- #881 [Windows / AMD] RX 6800M (gfx1031) runs with a self-built HIP engine — plus 2 Windows bugs found (packaging encoding, vision `vcvars`)
- #875 P40 + 3070 (mixed Pascal/Ampere pair): `layer_split: auto` vs forced splits on 0.1.39, with hit rates (follow-up to #604)
- #872 Session RESTARTS COMPUTER after 25-30 mins (gfx1100)
- #870 Intel Arc Pro B60 (e211), 24 GB: first run on 0.1.39 + 4 fixes for current main
- #847 Allow system ram to be used instead of SSD when available.
- #843 Tool calls silently dropped in agent sessions after an empty assistant turn (fix: skip empty assistant turns when rendering)
- #840 --calibrate on Windows + AMD (HIP prebuilt 0.1.39) measures decode ~18x slower than the same engine through server.py, so the tuning is meaningless
- #831 The profile's length caps the expert arena — even an explicit --expert-cache N
- #821 ROCm on Windows ZIP
- #816 0.1.39: decode on an RX 6800 (gfx1030, Windows) is 12-22% slower than 0.1.38; STRATA_SH_STREAM=0 removes it
- #814 Would it be possible to add support for the AMD Radeon RX 6750 GRE 12GB?
- #798 Hybrid CPU detection on Linux counts only the Turbo Boost Max 3.0 "favored" cores as P-cores (Core Ultra 7 270K Plus: 2P/22E instead of 8P/16E) — affects setup's `--pool-workers` and `--pool-affinity auto|p-cores`
- #775 Community result: 2.5-3.1x output at 256K context on a 16 GB card (IQ3_S) - calibration, --spec 6, learned profile
- #767 --vision cpu caps images at 300 tokens; llama.cpp's mtmd asks for >=1024 for Qwen-VL grounding
- #754 Anthropic API: tool calls intermittently emitted inside `thinking` and returned as `end_turn`
- #747 Feature request: multi-conversation parking on multi-GPU layer-split
- #709 Does the HIP backend work on non-AMD GPUs via chipStar (HIP → SPIR-V)? Spike says yes with a 3-line shim diff
- #703 [AMD HIP] RX 6750 XT (gfx1031) works in heterogeneous layer split; long multimodal prompts can crash the engine
- #702 [AMD HIP] RX 9060 XT (gfx1200) Repeating output
- #697 Windows HIP / gfx1201: prompt stalls at `GPU rang 0`; post-store `__threadfence_system()` resolves it
- #690 Layer split: native prefill kernels fail on the second GPU (no kernel image available), regardless of which card it is
- #669 RTX 5090, 1M context: --prefill auto:32768 reads a 598K prompt 21% faster, and above 135K cells the reference top-k costs more than the block scores
- #661 Proposal: save and restore a conversation to disk (/slots/0?action=save|restore)
- #654 HIP (gfx1200) RuntimeError Exception Code: 0xC0000005
- #649 HIP (gfx1030): intermittent 'verify: timed out at layer N (#267)' with UD-Q4_K_XL — repro data
- #647 Swift-Qwen3.8-Flash-Next-GSQ-RCO-IQ3_XXS works on double Vega 20 GPU (Radeon Pro VII 16gb each).
- #641 AMD Instinct MI50 / MI60 / Radeon VII (gfx906, wave64): a working port, numbers, and PRs to upstream it
- #625 Vision (CPU path): offer a Q8_0 mmproj and a higher image-token cap
- #613 AMD 9070 XT on Windows causes VIDEO_ENGINE_TIMEOUT_DETECTED
- #612 Possible to support gfx1151?
- #605 --ple-io direct on rotational storage deadlocks prefill; the watchdog reports it as a generic engine stall (triage discriminator + --ple-io ram fix)
- #597 setup: a draft vocabulary for French, acceptance 0.52 to 0.64 and decode 11% faster on an RTX 5090
- #590 RX 7900 XTX (gfx1100), Ubuntu, setup's ROCm 7.10 wheel: ~0.8 tok/s decode, GPU at 100% / ~320 W
- #587 tools/make_profile.py --base cannot reorder a complete base (shipped profile reports 0 from the traces)
- #579 AMD/HIP RX 9070 XT (gfx1201) stalls during batched prompt ingestion on ROCm 10.0
- #573 Can Strata support Intel Arc B580?
- #566 Proposal: extend existing calibration to Linux HIP
- #560 AMD/Linux desktop: default VRAM reserve (700 MiB) lets the driver evict ~24 GB to RAM, OOM kills kwin; --vram-reserve-mib 3072 fixes it
- #557 AMD MultiGPU
- #556 EXL3 (exllamav3 trellis) weight support
- #549 Update.sh fails to update with a KeyError: 'args' error
- #542 sm_120 + IQ packs: ~4x prefill regression 0.1.34-0.1.36 when libcudart's ABI is mismatched - the #420 fits() gate silently disables MMQ (smpbo reads 1)
- #541 AMD/HIP (R9700, engine 0.1.36): batched prompt read stalls at a repeatable token; STRATA_PLE_BATCH=0 avoids it
- #539 Strata support AMD's RDNA2, specifically the RX 6900 XT.
- #534 Performance, RTX3060 vs RX7800XT
- #518 Feature request: MacOS M-Chip support
- #516 desktop (KDE/Wayland): compositor VRAM exhaustion when expert-cache auto fills a 24 GB card - pin framebuffer -12, KWin graphics reset
- #515 Feature request: Intel Arc B390 / Panther Lake iGPU support on Windows (64 GB shared RAM)
- #514 Feature Request: use AMD iGPU instead of CPU for offloading
- #509 layer_split auto is 2.86x slower than a balanced K on prefill with a heterogeneous pair (3080 + V100, measured)
- #505 gfx1100 (W7800 48 GB, 30 GB RAM): full-resident experts — decode 76.5 t/s @ ~100K ctx on 0.1.34 (no thinking), + hipBLASLt 100202 table, IQ2_XS vs IQ3_XXS reversed
Pull requests
- #1499 core: write reduced helper rows directly to mapped output
- #1494 bench: heterogeneous RTX 5070 Ti + 5060 Ti, experimental PP32 KV-grow and adaptive DMA
- #1493 Experimental cooperative memory relief and resumable text requests
- #1492 fix(serve): save and restore sessions without an MTP drafter
- #1490 Add a workflow that builds and pushes the Docker image on a version tag
- #1489 Responses persistence and disk-only cache: CUDA/HIP integration
- #1486 feat: introduce Dockerfile.rocm-stable
- #1480 serve: --conversation-cache-disk-only - the conversation cache on disk, with no RAM budget (depends on #1271, #1269)
- #1471 feat: optionally offload idle session state while keeping model weights loaded
- #1467 bench: community report - RTX 4090, Flash-Next IQ3_XXS at 204800, engine 0.1.40.3
- #1465 cuda: retain HC norm products in existing scratch
- #1460 Community benchmark: RTX 5080 in Docker Desktop on Windows (WSL2), Coder IQ1_M, 128K and 64K
- #1458 helper cache: configurable VRAM allowance with allocation-floor checks
- #1449 Add Metal backend support for Strata on macOS
- #1439 perf(prefill): cache immutable BF16-to-FP16 weight conversions
- #1438 perf(peer): add opt-in byte-capacity-aware expert placement
- #1437 perf(cuda): add opt-in shape-tuned sm75 interleaved verify
- #1436 fix(serve): isolate CPU cores for independent Linux replicas
- #1434 telemetry: GPU load, VRAM, temperature and power for AMD cards on Windows (#1380)
- #1426 dflash: experimental standalone DeepSpec DFlash block drafter for Qwen3.8-Flash-Next (greedy, correctness-first)
- #1424 Pascal GP100: a Q8_0 decode GEMV (STRATA_Q8_SM60=1, opt-in) and IQ3_XXS / IQ3_S tables in shared memory
- #1420 Add optional GLM-5.3-Flash support from Project Maya
- #1418 cuda: opt-in MMVQ activation reuse across output rows
- #1417 prefill: scope each split-stage loan estimate to its device
- #1416 prefill: the CPU share's activations quantized on the GPU, copied down beside the routing sync (builds on #1414)
- #1414 prefill: the CPU share (STRATA_PREFILL_CPU_SHARE) up to 3,072-token chunks, from mapped experts, on a layer split
- #1406 bench: community report, RX 7900 XTX (gfx1100) on WSL2, Coder IQ1_M: 0.1.33 vs 0.1.40, prefill streaming, 16k-256k sweep
- #1402 Qwen3.6-35B-A3B and Ornith-1.5-35B-A3B (qwen35moe): a second, smaller model for 8-12 GB cards
- #1401 V100 (sm_70): prompt experts on FP16 tensor cores (+10% prompt) and three existing decode kernels as defaults (-6.8% GPU per window)
- #1396 hip/gfx906: the tree does not build (q6_k MMQ instance and cudaEventBlockingSync)
- #1395 hip: a hipBLASLt tuning table for gfx1150 (Radeon 890M), and gfx1151's exact speed switches on gfx1150
- #1391 docs: STRATA_PREFILL_STREAM_MIN=128 in the gfx1151 fast configuration (agent-sized prompt reads on the fused experts: 3.4 -> 2.1 s per turn on Strix Halo)
- #1388 hip: gfx1151 hipBLASLt tuning table for setup's ROCm 7.14.0a20260608 (hipBLASLt 1.4.0)
- #1383 generate: say that CUDA_LAUNCH_BLOCKING=1 hangs the verify windows (#1341 #964)
- #1379 prefill: STRATA_PREFILL_CPU_SHARE=auto times layers with and without the share and shares only while that is faster (#1282)
- #1378 bench: community report, RX 6600 8 GB (gfx1032), EPYC 7232P, IQ3_XXS 128K on Linux
- #1376 bench: add RX 7900 XT results for IQ3_S and IQ3_XXS
- #1374 experts: IQ1_S on GPU/AVX-2, IQ1_S+IQ1_M on AVX-512, and a measured PCIe share
- #1372 DeltaNet recurrence: STRATA_GDN_CHUNKED=1 - the prompt's recurrence in 32-token chunks (opt-in, 1.8x faster, other bits)
- #1370 prefill: opt-in STRATA_HC_UPMIX=1 on CUDA - the hyper-connection up projection with gr_mix_r as its epilogue (sm_80+)
- #1368 prefill: quantize each token's MoE input once and scatter it to its k rows (the same bytes)
- #1367 prompt attention: STRATA_PROMPT_ATTN_IMMA=1 - the int8-KV kernel on INT8 tensor cores (opt-in, closer to FP32)
- #1361 tools/hip: gfx1151 hipBLASLt 100500 tuning table (Windows ready-made …
- #1360 gfx1151: STRATA_EXPERT_V2K on by default (UD-Q4_K_XL decode experts: same text, +6.5% greedy / +9.9% sampled output on Strix Halo)
- #1343 Add support for CYBER-FROST-3.8 (Blackfrost): read qwen4exp.nextn_predict_layers
- #1340 core: retain fixed RAM originals during native async exchanges
- #1334 Adding support for 890M
- #1332 calibrate: the PCIe share sweep reaches 1.0, where no expert goes to the CPU pool
- #1327 serve: opt-in finite video input
- #1324 file tier: an LRU part of the RAM budget (--resident-lru-gib), elastic under memory pressure (Windows)
- #1323 prefill: batched unbuffered stager reads; close the experts.bin view once reads are unbuffered (port of #833)
- #1321 bench: publish an IQ2_XS speed report for the Radeon AI PRO R9700
- #1320 test: qualify existing exact HIP paths on gfx906
- #1319 serve: add opt-in bounded Responses history and continuation
- #1318 docs(AMD_HIP): my R9700 numbers for hipBLASLt 1.4.1 and STRATA_HIP_WMMA
- #1313 hipBLASLt table for gfx1201 at 100200 (R9700 calibrated, +15% prefill)
- #1307 Add Dockerfile for building ROCm-based Strata Docker images
- #1305 decode: --lookup-chain 1 and 2 do not change the window cap with the default --suffix-draft
- #1303 decode: --lookup-chain 1 and 2 do not change the window cap with the default --suffix-draft
- #1298 hip: the gfx110x fp16 (rocWMMA) qsa-select scorer arm (STRATA_SELECT_WMMA)
- #1297 HIP: on-device autotuning for gfx1100 decode (kernel shapes, draft and CPU settings)
- #1296 hip: chunk-parallel GDN recurrence (WY form), two parity-gated arms (STRATA_GDN_WY)
- #1293 Community benchmark: RX 7900 XTX 24 GB — ROCm 7.1.1 vs ROCm 10.2 nightly
- #1292 Docs: AMD RX 7900 XTX (gfx1100) IQ3_S rates row (1K-128K)
- #1289 hip: the gfx1100 100401 table covers the small-T expert GEMM (prompt +31.9%)
- #1287 feat(vision): support Windows HIP image encoding
- #1282 prefill: STRATA_PREFILL_CPU_SHARE=auto hands a small chunk's least-routed experts to the idle CPU pool (opt-in)
- #1281 sampler: coupled drafts with Gumbel-max picks (STRATA_SPEC_GUMBEL=1, opt-in): +7 points draft acceptance, +9% output at temperature 1.0 on Strix Halo
- #1279 perf(cuda): use exact GP100 VMAD for native DP4A emulation
- #1278 HIP: run the K-quant MMQ test on HIP builds; UD-Q4_K_XL measured on an R9700
- #1270 bench: community report, 2x RX 6900 XT (gfx1030) + Ryzen 5 5600X, IQ3_S at 131K on 0.1.40.1 - one card, layer split and expert helper; stock, the two gfx103x switches, and #1150 #1151 #1167
- #1266 Add the Update the engine card
- #1265 Add the engine updater: verify, stage, all-or-nothing swap, rollback
- #1260 tests: order MMQ parity transfers on the compute stream
- #1259 setup: --draft-vocab it - the English/code subset plus the tokens of Italian text
- #1253 Enable serial multi-GPU batch MTP
- #1251 --peer-device prompt share without P2P: host route, per-token sums, FP16 transfers (2.1-2.5x prompts on a no-P2P pair)
- #1240 Avoid unused MTP branch stream on HIP
- #1227 mcp: the install plan follows setup's AMD rules - Windows AMD and vision=cpu on Linux are planned (#990)
- #1224 serve: the Monitor's AMD GPU readings on Windows through ADLX (load, VRAM, temperature, power)
- #1223 generate: allow the elastic K/V with --peer-device (VMM ranges keep their memory on the owning GPU)
- #1220 fix #1121: preserve shared draft-head metadata in batch MTP slots
- #1219 setup: a Spanish draft subset (--draft-vocab es); Spanish answers dra…
- #1218 Check the ready-made engine against GitHub's SHA-256 before installing it
- #1209 Speed up concurrent generation, fix QFUSE, and improve prefill monitoring
- #1207 fix(serve): keep cached images alive through request preparation
- #1186 setup: --draft-vocab es - the English/code subset plus the tokens of Spanish text
- #1185 verify: a window graph that finds no VRAM frees older batch slot layouts' graphs instead of failing (#997)
- #1184 AMD HIP: the primary ordinal, and the helper caches beside the resident RAM mode
- #1182 serve: poll cancellation during quiet prefill waits
- #1173 bench: community report, RX 7900 XTX on Windows 11, IQ3_S, engine 0.1.40
- #1167 hip: a rocBLAS solution table for the FP16 prompt GEMMs on gfx103x (the GDN projection 7x below 1,152 tokens; short prompts -10 to -14%)
- #1156 setup: reach the CPU image encoder on Windows + AMD (#1155, #881)
- #1152 Fix Windows AMD telemetry and add optional Arabic UI
- #1151 hip: the FP32 tiled QSA block scorer on HIP cards (opt-in STRATA_SELECT_SIMT=1, as on CUDA; a 128K prompt +7.4% on gfx1030)
- #1150 HIP gfx103x: PR #540's attention kernel with 8 cells per step and DPP lane exchanges (bit-exact, prompt +6-12% on RX 6900 XT)
- #1149 HIP gfx103x FP16 prompt (#835 follow-up): STRATA_F16_RANGE measures what reaches FP16's range, and hip_prefill_gemm covers the FP16-io route
- #1148 tests: hip_prefill_wmma_gemm_parity skips on a card without matrix cores instead of failing
- #1144 serve: add opt-in instruction skills to Chat
- #1142 hip: accept gfx1010 and gfx1011 (RDNA1) in the arch gate
- #1140 bench: community report, 2x RX 7900 GRE (gfx1100), layer split, 0.1.40 #848/#859/#880 #776
- #1127 hip: rebased support for Radeon gfx1151 APUs
- #1123 HIP RDNA2 (gfx103x): prompt GEMMs as FP32 SGEMMs, a faster default that cannot overflow (RX 6800: 343 -> 534 tok/s)
- #1120 layer split: overlap the stages' hand-off (STRATA_SPLIT_OVERLAP=1, opt-in)
- #1114 Monitor: per-GPU view, more cards, and a layout you can rearrange
- #1110 fix(mtp): --batch-mtp exits on the first admission with a draft-vocab head (slot drafters never copy its type)
- #1109 docs(hip): GPU_PINNED_MIN_XFER_SIZE=1048576 stopped our gfx1030 mmap-experts stalls (#267, #649)
- #1101 prefill: let Stager threads sleep instead of yield-spinning (Linux + --mmap-experts: prompts ~10x faster on DGX Spark, ~1 core instead of ~20)
- #1100 s2_qpn8: opt-in QPN8 expert GEMV on Volta m8n8k4 (M >= 4)
- #1099 layer split: the hand-off over peer access on NVLink (3.3 -> 48 GB/s, +0.9% e2e)
- #1096 qsa_prompt_attn: the Volta kernel's latency pipeline (32K int8 12.1 -> 10.2 ms, +1.2% e2e)
- #1093 Monitor: Load/Unload split button + idle-unload slider, load busy guard, honest unload
- #1092 launcher: pick a model and its settings in one window (experimental)
- #1087 cpu: allow configuring expert-pool tasks per phase
- #1084 hip/gfx906: `__dp4a` falls back to a 4-iteration loop although gfx906 has v_dot4_i32_i8
- #1083 hip/gfx906: the tree does not build (three STRATA_USE_HIP gates miss STRATA_HIP_GFX906)
- #1078 bench: RX 6800M (gfx1031) community report - self-built HIP engine on Windows
- #1077 feat(arm): build and run Strata on aarch64, including DGX Spark
- #1067 hip/gfx906: `__dp4a` falls back to a 4-iteration loop although gfx906 has v_dot4_i32_i8
- #1066 hip/gfx906: the 0.1.40 tree does not build (three STRATA_USE_HIP gates miss STRATA_HIP_GFX906)
- #1063 fix(mtp): --batch-mtp exits on the first admission with a draft-vocab head (slot drafters never copy its type)
- #1062 bench: community report, 2x RTX 4060 Ti 16 GB + Threadripper PRO 3975WX, UD-IQ4_XS at 131K, layer split
- #1060 Monitor: per-GPU view, more cards, and a layout you can rearrange
- #1057 prefill: let Stager threads sleep instead of yield-spinning (Linux + --mmap-experts: prompts ~10x faster on DGX Spark, ~1 core instead of ~20)
- #1055 two-PC: a second PC runs a block of layers as a stage of the layer split (--stage-server / --remote-stage, decode only)
- #1038 decode: STRATA_PCIE_BALANCE=1 picks each layer's PCIe count from measured costs (opt-in)
- #1032 serve: add opt-in bounded Responses history and continuation
- #1030 serve: --elastic, an automatic elastic expert cache with a fixed core (opt-in, CUDA VMM)
- #1027 bench: community report, RX 6700 XT 12 GB (gfx1031), Ryzen 7 5700G, I…
- #1024 s2_qpn8: opt-in QPN8 expert GEMV on Volta m8n8k4 (M >= 4)
- #1023 layer split: the hand-off over peer access on NVLink (3.3 -> 48 GB/s, +1.0% e2e)
- #1020 qsa_prompt_attn: the Volta kernel's latency pipeline (32K int8 12.1 -> 10.2 ms, +1.5% e2e)
- #1017 feature: RDNA3 support / Cache-aware routing
- #1016 Bench: RTX 5060 Ti 16 GB on Ryzen 9 7945HX, IQ3_S
- #1007 hip: the QSA block scores on rocBLAS SGEMM, the solution measured on the card (opt-in; a 128K prompt +2.8% on gfx1030)
- #1006 HIP RDNA2 (gfx103x): run the prompt path's 16-bit GEMMs as FP32 SGEMMs (RX 6800: prompts 312 -> 452 tok/s)
- #1002 arena: STRATA_ARENA_MMAP on Windows (mapped experts.bin, streamed first fill)
- #1000 HIP: gfx1102 (RX 7600) community-validated, with an end-to-end run (follow-up to #192)
- #999 hip: the fused-int8 MoE kernels on gfx1100 rocWMMA - opt-in STRATA_PF_FUSED arm + parity fixture (engagement: parity, REJECT-at-parity recorded)
- #996 hip: accept gfx1010 and gfx1011 (RDNA1) in the arch gate
- #988 Resident RAM mode with a layer split: only the experts no stage's cache holds (UD-Q4_K_XL on 2x 3090 with 64 GB)
- #981 hip: a rocBLAS solution table for the FP16 prompt GEMMs on gfx103x (the GDN projection 7x below 1,152 tokens; short prompts -10 to -14%)
- #969 serve: Q4 at 297.3 tok/s non-MTP (N=8); MTP +30.4% decode (N=2)
- #955 bench: Arc Pro B65 Gen4 results on patched v0.1.40
- #949 cpu: allow configuring expert-pool tasks per phase
- #946 launcher: pick a model and its settings in one window (experimental)
- #944 hip: gfx11 WMMA prompt attention and selection scorer, gfx1151 hipBLASLt table
- #943 Add experimental deepMoE Vulkan backend for DeepSeek text chat
- #936 layer split: overlap the stages' hand-off (STRATA_SPLIT_OVERLAP=1, op…
- #934 Per-layer expert cache: each layer's slots are that layer's blob
- #933 CPU trellis kernels (AVX2 / AVX-512) for TQ2_T / TQK6 / TQK7 expert-cache misses (stacked on #928)
- #930 cpu: IQ3_S / IQ2_S AVX2 decode without the per-index shift/mask/or (1.07-1.6x per row)
- #928 Gyro (TQ2_T / TQK6 / TQK7 + Hadamard rotation): native support for the agentionai Qwen3.8-Flash-Next quants
- #927 bench: community report, 2x RX 6900 XT (gfx1030) + Ryzen 5 5600X, IQ3_S at 131K - one card, layer split and expert helper, stock 0.1.39 and with #835/#849/#854
- #920 docs(hip): GPU_PINNED_MIN_XFER_SIZE=1048576 stopped our gfx1030 mmap-experts stalls (#267, #649)
- #919 hip: Windows support for Radeon gfx1151 APUs (on #895)
- #917 bench: community report, Qwen3.8-Flash-Next-GSQ-RCO Q2_0 (Strix Halo/Radeon 8060S gfx1151 + 128 GB VRAM)
- #912 setup: show the GPU's PCIe link in step 1, warn on fewer lanes than the card has
- #910 Two-GPU decode: bounded attention merge (bitwise, opt-in) and pipelined PLE read-ahead / early chain (stacked on #905)
- #904 Verify window: PDL on sm_90+, graph branches, batched Q4_0 KV append and PLE post-ops (bit-identical)
- #896 ple: accept Q5_1 and Q8_0 n-gram tables
- #895 hip: support Radeon gfx1151 APUs
- #888 hip: chunk-parallel GDN recurrence (WY form), two parity-gated arms - opt-in STRATA_GDN_WY (measured on gfx1100)
- #887 layer split: score every four-way placement instead of guessing it
- #885 Perf/duplex transfers only
- #883 sm_60: PTX vmad for the __dp4a fallback (bit-exact, ~2.2x in isolation)
- #880 layer split: the stage weight trim works under `auto` too 4X gain in the prefill in 4 way ring
- #876 Asynchronous adaptive expert tier for the resident RAM mode (--adapt-async 1, opt-in)
- #873 Fix first-kernel-launch crash on Windows (ROCm/Adrenalin WDDM startup race)
- #865 ngram: add opt-in Q8_0 PLE table support
- #864 perf: opt-in resident expert exchange buffer rotation
- #863 cpu kernels: gathered decode on the cores where it is faster, AVX-VNNI rows, IQ3_S one-token kernel
- #859 Layer split: pipelined verify windows for one conversation (--pipeline-windows, opt-in)
- #858 gfx906 compat: cudaFuncSetAttribute as a template function, the shared-memory carveout name (#646's fused_gr did not build)
- #856 hip: RDNA3 (gfx1100) WMMA kernel for the QSA block-score select/scorer (opt-in STRATA_SELECT_WMMA, gfx12/gfx11)
- #854 expert plan: a helper GPU's experts are not part of the PCIe share (--remote-expert-opt decode 40 -> 66 tok/s on 2x RX 6900 XT)
- #850 bench: community report, Tesla V100 32 GB + RTX 4070 layer split with 16 GB of RAM (IQ2_XS)
- #849 HIP gfx103x: PR #540's attention kernel with 8 cells per step and DPP lane exchanges (bit-exact, prompt +6-12% on RX 6900 XT)
- #846 Keep MTP drafting in concurrent batch slots
- #839 Add experimental Linux gfx900 setup with wave64 validation
- #835 HIP gfx103x: the prompt path's 16-bit GEMMs in FP16 in and out (prompt reads ~2x on RX 6900 XT)
- #833 Prefill: batched unbuffered expert reads, close the experts.bin view; opt-in RAM budget with helper caches
- #826 verify: the shared-expert stream fork starts off on HIP (fixes the 0.1.38 -> 0.1.39 decode regression, #816)
- #820 prefill: the dense GGUF projections through MMQ on HIP (opt-in STRATA_DENSE_MMQ=1)
- #815 bench: community results for an RX 6800 on Windows (0.1.39 against 0.1.38)
- #808 hip/gfx906: cudaFuncSetAttribute must be a function, not a macro (ROCm 7.2.1 build fix)
- #807 cuda: opt-in batched expert uploads to reduce host submission overhead
- #805 Lazy vision encoder: per-GPU elastic expert caches
- #802 Run IQ1_S (Unsloth UD-IQ1_S) on the GPU and AVX-2, and read the expert file tier faster
- #792 batch slots: the zero-doorbell graph (100% VRAM resident) rings no layer
- #789 prefill: overlap shared-expert work with routed expert uploads
- #786 hip: RDNA3 (gfx1100) WMMA kernel for the int8-KV QSA prompt attention (opt-in STRATA_HIP_WMMA, gfx12/gfx11)
- #783 perf(cuda): fused decode/verify/MTP kernels and graph launch reductions on 0.1.39
- #778 iq_kernels: portable aligned shared-memory declaration for gfx1030
- #768 Add Dockerfile for building ROCm-based Strata Docker images
- #766 hip: a gfx1100 hipBLASLt tuning table for 100401 (packaged ROCm 10.0.0)
- #758 bench: community MI50 (gfx906) — Strata 0.1.38 speed and recall
- #755 hip: gfx1100 hipBLASLt 1.5.0 tuning table (ROCm 10.2 nightly) — closes the gfx1100 100500 gap
- #753 serve: isolate concurrent request metrics (depends on #559)
- #752 cache: preserve checkpoints when split allocation fails (depends on #559)
- #745 Community benchmark: RX 7900 XTX 24 GB — ROCm 7.1.1 vs ROCm 10.2 nightly, serve-path decode (Qwen3.8-Flash-Next IQ3_S)
- #744 HIP: on-device autotuning for gfx1100 decode (kernel shapes, draft and CPU settings)
- #741 prefill: BF16 projections on FP16 tensor cores below sm_80 (+8-17% prefill on a 2080 Ti)
- #740 Community benchmark: RX 7900 GRE (gfx1100, 16 GB), three Flash-Next quants
- #732 Overlap streamed KV uploads with prefill computation
- #731 Avoid duplicate expert slots across helper and primary GPUs
- #726 Add opt-in live cache resizing and desktop resource presets
- #720 tools/hip: Add hipBLASLt tuning table for gfx1100 on ROCm 10.0.0 / hipBLASLt 1.4.1 (100401)
- #712 Fix Windows AMD telemetry and add optional Arabic UI
- #711 kv: --kv k8v4 streams with --kv-resident
- #699 Linux: read ahead at startup (cold start ~920 s → 70 s)
- #696 web: saved chats and projects on the server, a file viewer, a coding agent, engine start/stop (#361)
- #695 hip: the tuning table's arch gate accepts the RDNA4 sibling (gfx1200 <-> gfx1201)
- #693 prefill: auto:16384 tries every 1024 tokens above 8192, and equal chunks - prompts 21-38% faster from 20K on a 16 GB card
- #689 MTP / coding +20% speedup Experimental/rtxpro q8 buffer ownership
- #688 Bench: RTX 5090 / Ryzen 9 9950X3D, IQ3_S, v0.1.34 vs v0.1.38 vs fused prompt kernels
- #685 Add optional Windows HIP vision encoder builds and package validation
- #683 setup: a re-run of setup carries over the hand-edited config blocks (#629)
- #677 bench: Linux + 2x AMD Instinct MI50 16 GB (gfx906), Coder IQ1_M, 4K to 128K prompt tokens
- #668 Session files: save and restore a conversation to disk (POST /slots/0?action=save|restore)
- #667 Add Intel XPU backend: Qwen decode on Arc Pro B60 via SYCL
- #666 setup, serve: the image encoder's device as its own role (--vision-device)
- #663 prefill: a layer split's idle card streams a share of a one-chunk prompt's experts
- #659 Fix WDDM host pinning for gfx1031 native inference
- #656 serve: cooperative prefill preemption at safe chunk boundaries (--prefill-preempt)
- #655 sm_75: run the prompt path's BF16 products on the FP16 tensor cores (+15-18 % prefill on RTX 2080 Ti)
- #651 ple: read Q8_0 and Q5_1 n-gram tables
- #648 native dense: run the architecture guard only on the first shard of a split
- #640 STRATA_ARENA_MMAP=1: the expert arena as a read-only mapped file (Linux), for small-RAM machines
- #639 layer split: with explicit split points each GPU loads only its own layers' dense weights
- #638 hip: AMD Instinct MI50 / MI60 / Radeon VII (gfx906, wave64) as an opt-in build
- #636 native: add opt-in GBNF constraints to existing generation
- #635 serve: a malformed "tools" value is a 400 naming the field, not a closed connection (#592)
- #634 strata_pack.py build: refuse an output directory that already holds a pack, naming the file
- #632 expert profile: refuse a header version other than 1, naming both numbers and the file
- #630 serve: add opt-in stateless Responses API
- #628 bench: report Coder IQ1_M on Threadripper 3990X and RX 6900 XT
- #627 opt for sm_70(just test V100-16g*1 or 2)
- #626 cpu: preserve full thread affinity on Windows and Linux
- #619 Add support for CYBER-FROST-3.8 (Blackfrost): read qwen4exp.nextn_predict_layers
- #618 bench: Windows 11 + Radeon AI PRO R9700 (gfx1201), IQ2_XS, 4K to 248K prompt tokens
- #614 serve: optionally checkpoint an existing chunk near the prompt tail
- #603 qsa_select: a 1,024-thread top-k past the register kernel's reach (CUDA) - a 243K-token prompt +26% on an RTX 3060
- #589 make_profile: --reorder so a trace can rank ahead of a complete base
- #586 ple: read the PLE table at full BF16 precision (opt-in, alongside FP8)
- #584 Split placement search
- #575 qsa select: split the top-k past the register fit - 9% faster long-prompt prefill
- #570 setup: a read-only --gguf-dir no longer stops setup when marking checked shards
- #569 serve, setup: an empty API key is refused from the config file and from setup's --api-key (#213)
- #568 parity tests: ple_parity runs without the missing fixtures, gr_parity and ple_parity wait for their setup
- #565 tools/hip: add gfx1100 hipBLASLt tuning table for hipBLASLt 1.2.2 (100202)
- #563 Give the expert cache's VRAM back without unloading the model (#533)
- #562 serve: /slots reports n_prompt_tokens, so a llama.cpp-style context m…
- #546 prefill: the fused layout's smaller MoE buffers only when every layer takes the fused path (STRATA_PF_FUSED=1 on IQ2_XS wrote past them)
- #524 Adding experimental support for gfx1031 - 6700 XT
- #512 prefill: use active QSA top-k bounds on Turing with large KV capacity
- #504 web: saved chats in a sidebar, kept in localStorage (#361)
- #499 bench: community results, RX 9070 XT 16 GB on Windows 11, ready-made AMD engine 0.1.35, IQ3_S
- #482 Networked Pool support
- #478 prefill: MMQ prompt kernels for Q6_K experts (STRATA_MMQ_KQUANTS)
- #472 tests: test_prebuilt_hip_zip passes on Linux (EXE as on Windows)
- #470 setup: a download stopped before its rename is finished without a request (no 5-minute 416 retry loop)
- #469 bench: community results, RTX 2080 Ti 11 GB + Threadripper 3960X, IQ3_S at 262K with KV streaming
- #464 ple: read the n-gram table at full BF16 precision
- #456 Monitor: the conversation cache card (parked conversations from the engine's CACHE lines)
- #455 setup: mark the Unsloth family NVIDIA only so far in the AMD menu, and point a mixed PC to its NVIDIA card (#429)
- #453 prefill: the draft layer's batched K/V for a ring too (KV streaming) - prefill +4.6% with --kv-resident
- #452 qsa_prompt_attn: Q4_0 KV on tensor cores (mode 4) - long prompts with --kv q4_0 ~19% faster
- #449 fix: fall back when ROCm development files are missing
- #442 hip: add community gfx1012 support with version-gated legacy compatibility
- #441 Contrib/non mtp serving
- #440 bench: community report, RTX 5090 + Ryzen 9 9950X3D, IQ3_S at the full 262K window; prefill auto:32768 A/B; conversation-cache 32 GiB demo
- #439 prefill: a group's expert gathers in one launch (bit-identical, long prompts +4%)
- #436 serve: a non-streaming request stops when its client disconnects (#430, part of #431)
- #435 setup: resuming a download asks only for the missing space, and a finished .part is not re-requested (#425)
- #428 tests: test_setup_golden passes on Linux (<EXE> only as a whole path part)
- #427 tools/vision: portable by default, setup.py/Dockerfile opt into native (#411 #412 #419 follow-up)
- #426 Windows AMD: the HIP backend detects, builds and runs (RX 9070 XT / gfx1201)
- #422 hip: enable experimental Strix Halo gfx1151 source builds
- #409 aarch64 / NVIDIA DGX Spark (GB10): build, run and set up with unified memory
- #405 docs: add performance documentation and update repository hygiene
- #404 bench(gfx1100): 0.1.31 vs 0.1.30 prefill/decode, curated entry + raw trials
- #395 Feature/nvidia p40
- #394 AVX1: run on a CPU with AVX but no AVX2, with an end-to-end run on Sandy Bridge-E
- #387 AMD: ship the gfx1200 hipBLASLt table, with the with/without measurements
- #386 tools/hip: gfx1201 hipBLASLt table for ROCm 7.2.4 (hipBLASLt 1.2.2), ~1.8x prompt speed on the R9700
- #382 HIP: MTP prompt pass per group by default (fixes prompt hang on gfx1201 with KV streaming)
- #381 Add HIP image encoder support and Linux AMD GPU telemetry
- #380 HIP: count the desktop's VRAM on Windows (WDDM budget, STRATA_WDDM_BUDGET)
- #377 HIP: time the PCIe probe on the host on Windows
- #376 HIP: a failed first configure no longer leaves the kernels at -O0
- #373 HIP: build with Visual Studio 2026's C++ library (MSVC 14.51+)
- #368 QSA select: RDNA3 (gfx1100) WMMA block-scores arm on #337's arch dispatch (opt-in STRATA_SELECT_WMMA=1)
- #366 [RFC] EXPERIMENTAL Investigate DFlash2 support for Qwen3.8-Flash-Next
- #360 qsa_prompt_attn: Volta (sm_70) crashes in the prompt path - compare the full compute capability
- #356 HIP: build the AMD engine on Windows
- #353 NVFP4 routed experts on 0.1.35 (experimental): 120a only for the W4A4 unit (rebase of #292)
- #339 hip: hipBLASLt tuning table for gfx1201 (R9700) with ROCm 10.2.0a nightly (hipBLASLt 1.5.0)
- #337 hip: gfx12 (RDNA4) QSA select - WMMA block scorer, prompt-aware top-k dispatch
- #336 cuda: add experimental Tesla P4 8GB (sm_61) support
- #333 serve: add lazy startup and reliable Windows model cleanup
- #330 V100 (sm_70): the compute-capability floor drops from 7.5 to 7.0
- #329 hip: gfx12 (RDNA4) WMMA kernel for the int8-KV QSA prompt attention (1.26-1.35x prompt processing)
- #325 AMD working on Windows (9070XT tested)
- #323 hip: add experimental RX 5500 XT 8 GB (gfx1012) support
- #322 hip: fast packed-byte intrinsics for RDNA3/RDNA4 (v_perm_b32 + SWAR)
- #319 Docs: AMD RX 7900 XTX (gfx1100) IQ3_S rates row (1K-128K)
- #318 iq_pack: store an F32 ple_conv1d as F16
- #315 hc: the multi-token hyper-connection read split finer
- #313 RDNA3 WMMA kernels for the gfx1100 prefill (opt-in, runtime-gated on gfx11; rebased on 0.1.30)
- #312 QSA select: ROCWMMA block-scores arm (opt-in STRATA_SELECT_WMMA=1, gfx1100)
- #311 HIP: support RDNA2 gfx1030 working and gfx103X is untested.
- #302 HIP/Windows: batch expert copy dependencies in long prefill
- #296 Add OrcaRouter Q4_K_S support (0.1.30)
- #292 NVFP4 routed experts: converter, pack, decode, prompt path (W4A8, W4A4 on Blackwell), AVX-512 CPU rows
- #291 PLE: the n-gram table in FP8 E4M3, as Qwen ships it (opt-in)
- #290 Token embedding in BF16 from the checkpoint (--embd-gguf)
- #287 setup: --draft-vocab cyrillic (English/code + the whole Cyrillic script)
- #275 Add bounded disk persistence for evicted conversations
- #272 feat(cpu): add hybrid architecture awareness and --pool-affinity for P/E-core CPUs
- #262 HIP: gfx1201 (Radeon AI PRO R9700) support, faster packed byte intrinsics, and a gfx1201 hipBLASLt table
- #260 RDNA3 WMMA kernels for the gfx1100 prefill (dense GEMMs and prompt attention)
- #257 q2_avx2: two-block 256-bit unpack for the AVX2 Q2_0 expert rows (bit-exact)
- #256 HIP: support RDNA4 gfx1200 (RX 9060 XT)
- #255 Q8 0 support
- #254 AMD HIP: accept gfx1101 alongside gfx1100
- #247 HIP: Windows and gfx1201 (RX 9070)
- #242 IQ kernels: decode each weight part once for every column and entry, bitwise identical
- #241 Faster grouped and per-hit Q2_0 expert kernels, bitwise identical
- #240 gemm: name the cuBLAS/CUDA call that failed at init, and flag resource shortages
- #235 verify: STRATA_LOGPOS hook for per-position log-probabilities (items 12-13 of #84)
- #234 Bench: RTX 3090 / dual RTX 3090 on EPYC 7453
- #228 QSA select on tensor cores (rocWMMA, opt-in, gfx1100) + AMD RX 7900 XTX rates row + verify profiler columns fix
- #227 AVX1: the Q2_0 expert kernels for CPUs that have AVX but no AVX2
- #223 Multi gpu: Layer split: pinned arena, lent prompt buffers, tested planner (2 x 2080 Ti decode +34%, 29K prompts +61%)
- #216 Multi-GPU: the session carve and the per-stage prompt loans
- #197 sampler: top_k by lexicographic threshold, split over the whole GPU
- #192 HIP: support RDNA3 gfx1101/gfx1102 (RX 7600/7700/7800), not only gfx1100
- #190 Spill evicted conversation snapshots to a bounded optional disk cache
- #189 Preserve alternating conversations with a shared snapshot core and bounded RAM cache
- #176 HIP backend on gfx1200 (RDNA4, RX 9060 XT): the gfx1100 backend runs unchanged with three deltas (Changes made by GLM5.3-Flash from freebuff)
- #175 Preserve independent conversation caches across interleaved requests
- #170 hip: gfx1100 hipBLASLt tuning table for ROCm 7.2.1 (100202)
- #169 generate/verify: make diagnostic dumps work under --spec for native packs
- #168 hip: support Q2_K embeddings and type-aware PLE table rows
- #166 build: replace CUDART_INF_F with INFINITY for HIP-only toolchains (fixes #157)
- #160 HIP follow-up: native-pack fixes, type-aware PLE rows, and clean test provisioning
- #154 Correctness fixes from #149 (s_gemv barrier, bf16 NaN, QSA page mask, verify-window bounds, MSVC, test build)
- #151 Add secondary GPU expert store (--vram-experts) and low-RAM multi-GPU setup
- #139 perf(prefill): add shape-selected pre-Ampere BF16 SGEMM with current-main A/B
- #126 Windows: the expert load runs 24x slower from Task Scheduler (0.05 vs 1.42 GiB/s); a hint names the cause
- #124 Pascal (sm_60): bring the engine up on compute capability 6.0
- #121 Add gfx1100 HIP support with tuned prefill and bounded expert uploads
- #105 The Monitor's GPU readings on ROCm: an amdgpu sysfs backend, and the disk rate without psutil
- #104 The Monitor's live tok/s is a rate over the last seconds, not the mean since the first token
- #102 feat: optional RAM and VRAM guard for the server it launches
- #94 Add experimental gfx1100 HIP backend for RX 7900 XTX
- #92 setup: name a missing or short shard with its numbers; verify reads back the manifest sha256
- #91 GGUF reader: refuse a duplicate tensor name at open, naming the tensor and the file
- #88 Pascal port: lower the CUDA floor to sm_61 (GTX 10 series)
- #84 EXPERIMENTAL Rope scaling: contexts past the trained 262K (none / linear / YaRN)
- #54 Support pruned expert variants (GSQ-RCO-Coder: 256 of 512 experts)
- #50 tools: add mmproj quantization utility
- #43 kernels: AVX2 multi-token i-quant row kernels (an AVX2-only CPU decoded every i-quant row once per token)
- #41 serve: preserve primary conversation state across auxiliary calls
- #22 tools: add real-time web dashboard for hardware and engine monitoring