#3582 [Benchmark] add isolated Ascend A2/A3 S2 projection probes

Beschreibung

## Problem and result

Ascend owners need a reproducible check of Strata's S2 layout and quantized-activation projections before attempting a full backend. This adds an isolated Ascend C experiment with an independent CPU/FP64 oracle and measurements on **A2 (910B3)** and **A3 (Ascend910_9362)**. No engine, installer, root build or default path changes.

| Target | Projection validation | Fused host-call medians | Same-day split baseline |
| --- | --- | --- | --- |
| A2, 910B3 | 21 cases x 3 fresh processes passed | 0.223-0.503 ms | about 0.97 ms |
| A3, Ascend910_9362 | 21 cases x 3 fresh processes passed | 0.228-0.530 ms | about 0.95 ms |

The same kernel and harness sources build and execute on both targets. All **21/21 projection output hashes match between A2 and A3** and are stable within each target's three processes. Each measured matrix avoids a **6.25 MiB** full decoded-weight buffer. A3 additionally passed 12 decoder boundary cases in each of three fresh processes (36 checks), plus the larger decode diagnostics.

The split baseline uses an unoptimized decoder and an extra ACL/framework synchronization. A3 fused medians were **2.3-5.5% higher** than the earlier A2 medians; that result is retained. Host topology, driver and NumPy versions differ. These are synthetic, single-chip projection diagnostics, not model throughput or a hardware ranking.

## Related discussion

None. This is a standalone hardware benchmark/probe, not an inference backend proposal. Open and closed issue/PR title searches for Ascend and 910B found no matching thread. A full Ascend backend would require a separate scope agreement under CONTRIBUTING.md.

## Approach

Keep two independent 32-element activation scales for every 64-weight block. Widen INT8 activation codes exactly through half to FP32, unpack one row's S2 codes, then use vector multiplication and grouped reductions for exact integer-valued dots before applying FP32 scales. The block reduction order differs from the default AVX expert.

The weight oracle calls the existing C++ Q2_0 decoder; projection results use FP64 host products and a cancellation-aware FP32 forward bound. The legacy activation quantizer is a portable host fixture transcribed from its scalar source, not execution of the x86 AVX implementation. A3 uses `-DSOC_VERSION=Ascend910_9362`, with no computational source change. Its runtime exposed two chips; only logical device zero was used, with the physical mapping recorded explicitly.

Evidence and exact commands: [A2 projection report](https://github.com/zhachar14h-cell/Strata/blob/9a07eb56b5efe0116b6c4137899f44c6a61dd5c2/bench/ascend_a2_s2/fused/RESULTS.md), [A2 decode report](https://github.com/zhachar14h-cell/Strata/blob/9a07eb56b5efe0116b6c4137899f44c6a61dd5c2/bench/ascend_a2_s2/RESULTS.md), [A3 report](https://github.com/zhachar14h-cell/Strata/blob/9a07eb56b5efe0116b6c4137899f44c6a61dd5c2/bench/ascend_a2_s2/a3/RESULTS.md), [A3 per-case output comparison and raw timing summary](https://github.com/zhachar14h-cell/Strata/blob/9a07eb56b5efe0116b6c4137899f44c6a61dd5c2/bench/ascend_a2_s2/a3/evidence/SUMMARY.json). Logs, raw rounds, rejected attempts and source/binary hashes are retained. AI assistance was used for implementation, investigation and reporting.

## Validation

The source reference is `9de04cd44e927a9a3df6bbc0e94fc1be8b844ba4`; A3 rebuilt the unchanged experiment from `e1e538174af1ec65ec5f9c124d2fee35f6f2b79f`. Both were measured on 2026-10-21. Existing headers and CPU expert dependencies had no diff against upstream `011c9e60` when the original PR was submitted. This does not relabel the measurements as runs of the latest engine.

| Environment | A2 | A3 |
| --- | --- | --- |
| Runtime device | Ascend910B3 | Ascend910_9362 |
| CANN / driver | 9.0.0 / 25.5.0 | 9.0.0 / 25.5.5 |
| Host | aarch64, Ubuntu 20.04.5 | aarch64, Ubuntu 20.04.5 |
| Python / torch / torch_npu | 3.11.4 / 2.7.1+cpu / 2.7.1.post4 | same |
| NumPy | 2.4.6 | 1.26.4 |

**Passed:**

- A2: decoder/reference and all three projection implementation builds; three final 21-case projection processes; parent decoder bitwise checks in three fresh synchronized processes and its final diagnostic harness.
- A3: clean decoder/reference and vector projection Release builds; FP16 identity smoke; three 12-case decoder processes and three 21-case projection processes. The larger decode diagnostics and all eight split-baseline shapes passed.
- Output guards, zero padding, unchanged inputs, invalid dimensions, FP32 bounds and output hashes. A3's maximum error used 0.0772 of the bound. Ordinary-scale projection maximum absolute error was 6.034e-6; the extreme-scale set reached 0.528201.
- Measured source/evidence SHA-256 checks, Python syntax compilation, local Markdown links, private-path scan and `git diff --check`. All new files are under `bench/ascend_a2_s2`. Computational sources remain unchanged by the A3 report commit.

For A3, the actual build commands used fresh target-specific directories:

```sh
cmake -S "$POC_ROOT/bench/ascend_a2_s2" \
  -B "$POC_ROOT/bench/ascend_a2_s2/build-a3-release" \
  -DCMAKE_BUILD_TYPE=Release -DSOC_VERSION=Ascend910_9362
cmake --build "$POC_ROOT/bench/ascend_a2_s2/build-a3-release" -j2
cmake -S "$POC_ROOT/bench/ascend_a2_s2/fused" \
  -B "$POC_ROOT/bench/ascend_a2_s2/fused/build-a3-release" \
  -DCMAKE_BUILD_TYPE=Release -DSOC_VERSION=Ascend910_9362
cmake --build "$POC_ROOT/bench/ascend_a2_s2/fused/build-a3-release" -j2
```

The linked A3 report contains the exact two three-process probe loops. Both use `OPENBLAS_NUM_THREADS=1`, the original seeds/shapes, `--benchmark` and distinct report paths. A2 commands and settings remain in its reports.

**Failed:**

- A2 scalar GM-read and cached-scalar projection versions passed correctness but missed the performance objective; sources and raw runs remain.
- Parent decoder's initial empty-build-type and reused-build-directory attempts failed. Its first runtime harness failed the 32-block check before explicit host-queue synchronization was added. These were prototype failures, not observed production-engine bugs.
- No A3 build or numerical check failed. An A3 fused timing improvement over the earlier A2 medians was not observed.

**Not run:**

- Real weights, complete gate/up-SwiGLU-down composition, NPU activation quantization, default AVX expert parity, routing, cache transfers, overlap, full inference, the second A3 chip, HCCL, multi-NPU and long soak. These are outside this probe's scope.
- CUDA, HIP, SYCL and Metal builds/execution: their files are untouched. Existing engine binaries were not rebuilt or compared.

## Limits

Host wall times include dispatch and synchronization. No device-event timing, clock locking, NUMA binding, HBM-traffic profiling or controlled background-load experiment was performed. Matching output hashes and common generator/seed do not independently establish byte parity of every input buffer; the original A2 harness did not record input hashes. Canonical FP32 scale planes are used instead of the interleaved legacy expert blob. Default-path preservation was checked by source diff, not binary comparison. No backend support or default change is requested.