#2807 [Feature]: SYCL: read prompts faster on Battlemage by attending over the union of neighbouring positions' selections

说明

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### What do you want to do?

Read long prompts faster on the SYCL port on an Arc Pro B70 (Battlemage) with INT8 KV.

Today the QSA prompt attention on SYCL runs the FP32 decode kernel (`qsa_decode_attn_batch`), 32 prompt positions per
launch, and every position gathers its own ~2,051 selected K/V cells. The XMX port of the tensor-core kernel
(`STRATA_PROMPT_ATTN_XMX=1`) is correct but slower than that fallback: it is gather-bound and only 12 of its 16 matrix
rows are real heads (docs/INTEL.md, "XMX prompt attention v2"). docs/INTEL.md also measured that 8 consecutive
positions of an 80K prompt select 3.3x one position's cells between them, and left a kernel over that union "not
built" because it multiplies the arithmetic.

What I would like: an opt-in kernel that takes 8 neighbouring positions together, gathers the union of their selected
cells once, runs the products for all 8 x 12 heads on XMX (every matrix row a real head, the extra arithmetic on the
matrix units), and masks per position so each one still attends to exactly its own cells. The default path stays as
it is.

Workaround today: none; the default FP32 attention is the fastest prompt attention on this card.

I have a working version. On upstream main with 2x Arc Pro B70 (layer split, Qwen3.8-Flash-Next ISTA GSQ-RCO IQ3_XXS,
INT8 KV) it reads 4K and 32K prompts 15-16% faster (1,189 -> 1,382 and 1,956 -> 2,246 tok/s) and cuts the first token
of a turn with 40,796 tokens of context from 23.28 to 20.39 s; decode is unchanged. The output is not bitwise (FP16
inputs to the products, about 1e-3 of the output scale against FP64). Details and the parity test in the pull request.

Prepared with AI assistance (Claude Code): the code, the measurements and this text were produced by Claude on the submitter's two Arc Pro B70s, at the submitter's request.