#320 verify: fix STRATA_VERIFY_PROFILE stage columns (unsigned stamp wrap + slot collision)

Description

Fixes the `STRATA_VERIFY_PROFILE` stage report so its derived columns (`(gap)`, `head`, `hc0 norm/down/up`) print sane ms/window values instead of `\~1e14 ms`. Metrics-only — **no computed model value changes**; this only affects the profiler's reported columns.

**Two integer-arithmetic defects:**

1. **Slot collision (`kProfPer` 32 -> 33).** The hc-read second half's `up` stamp was written to slot 32, which is the *next* layer's slot 0. That both corrupted the next layer's base stamp and left the up-stamp unreadable.

2. **Unsigned wrap on absent/out-of-order stamps.** A slot no kernel stamped is `0`; an unsigned `to - from` where `from` wrapped to `\~1e19 ns`, which is the `\~1e14 ms` we were seeing. 

**The fix** introduces a `gap(to, from)` helper that contributes `0` unless both stamps are nonzero and monotonic (`to >= from`), bumps `kProfPer` to 33, and shows the hc-read0 norm/down/up split only when the whole split chain is present (so it isn't counted twice). The column-header array is extended to match.

With the columns sane, the verify-window residual could be attributed: it is the `wait for rings` column (28 ms/round), and a no-doorbell floor (`STRATA_VERIFY_DEVICE_PLAN=1`) leaves it unchanged, so it is host-ring submission latency, not the expert-pool doorbell round-trip. Deliverable 3 of #228, re-scoped to stand alone per your request.