#2358 fused_gr: STRATA_GR_NORM_FAST=1 on CUDA too (opt-in): decode +0.5-0.6% on a V100 + PG500 layer split

Descripción

## Title

fused_gr: STRATA_GR_NORM_FAST=1 on CUDA too (opt-in): decode +0.5-0.6% on a V100 + PG500 layer split

Issue: none (on `main`, independent of other PRs; three lines in the CUDA side of `norm_fast_on()` and one comment)

## Summary

`norm_fast_on()` reads `STRATA_GR_NORM_FAST` under HIP only (on by default for gfx12); on CUDA it always returns false.
`gr_norm_split_fast_kernel` is built for CUDA too and is documented as bitwise equal to `gr_norm_split_kernel` (the same elements, operations and order).
It is used only when the hyper-connection read runs split or staged (`variant >= kHcSplit`); on this machine the engine reports
`the hyper-connection read runs as staged` on both cards.

This lets CUDA opt in with the same variable, on every CUDA architecture; we measured sm_70 only. Without the variable nothing changes.
It is separate from `gr_fast()` (on with `STRATA_SM70_TABLE=1`), which swaps the plain read's norm kernel and the up kernel; it does not choose
the split / staged norm that this variable switches. The numbers below are with `STRATA_SM70_TABLE=1` and this variable on top.

## What changed

- `src/kernels/cuda/fused_gr.cu`: on the CUDA side of `norm_fast_on()` (`#else`), read `STRATA_GR_NORM_FAST` once and return true when it is set and not 0.
  The HIP side is unchanged. The comment above it, "gfx12 only until another arch is measured", now says CUDA opts in (second commit, comment only).
- Other backends: both HIP builds (`STRATA_ENABLE_HIP` and `STRATA_HIP_GFX906`) compile the `.cu` files as HIP and take the unchanged `__HIPCC__` side.
  The SYCL build uses its own copy (`sycl/src/kernels/cuda/fused_gr.dp.cpp`), which this does not touch.
  HIP builds, without a GPU in ROCm 7.14 containers: `-DSTRATA_HIP_GFX906=ON -DCMAKE_HIP_ARCHITECTURES=gfx906` (the `mixa3607/rocm-gfx906:7.14-complete`
  image docs/AMD_HIP.md uses; `strata`) and `-DSTRATA_ENABLE_HIP=ON -DSTRATA_ENABLE_CUDA=OFF -DCMAKE_HIP_ARCHITECTURES="gfx1100;gfx1201"` (`rocm/dev-ubuntu-24.04:7.14.1-full`;
  `strata`) both compile with 0 errors. Not run (no AMD card here). SYCL not built: it does not compile the changed file.

## Checks (Tesla V100-PCIE-32GB + Tesla PG500-216 (sm_70, 32 GB), layer split K=24, Linux, CUDA 12.9, `-DSTRATA_EXPERIMENTAL_SM60=ON`)

How we checked: a build of this branch's first commit (`main` `a0116b2` + `16da736`; the second commit changes a comment only), the parity test and the
micro benchmark on each card with and without the variable, then the engine with and without it in ABBA order at two power limits.

- `gr_parity --selftest` (`STRATA_HC_SPLIT=2`) on the V100 and the PG500, `STRATA_GR_NORM_FAST` unset and `=1` (4 runs): every line passes.
  `fused_gr_bench 100 1 5 48` (48 weight sets in turn, read cold): the norm stage V100 9.1-9.2 -> 8.2 us, PG500 8.1-8.2 -> 7.2-7.3 us (T 1-5), `0 differing`.
- Engine: the GSQ-RCO IQ3_XXS model and pack that `setup.py --model IQ3_XXS` installs (`ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-GGUF`), with setup's
  launch settings (`--mmap-experts`, image input on, `--spec 4 --spec-min-p 0.5`), 256K context, int8 KV, layer split K=24, `STRATA_SM70_TABLE=1`,
  `STRATA_PLE_PROBE=0` (skips the start-up PLE read check and keeps direct reads). Every expert resident on both cards.
  Temperature 0, no thinking, three short questions (English, Japanese, code; generated to their caps of 400 / 600 / 400 tokens).
  A fresh engine start per run, one warm-up pass, then two passes (9 requests per start). On, off, off, on (ABBA) at 170 W and at 250 W.
  Decode tok/s (measured on the client from the stream; mean of two starts):

  | | English | Japanese | code |
  |---|---:|---:|---:|
  | 170 W off | 99.90 | 111.00 | 122.15 |
  | 170 W `STRATA_GR_NORM_FAST=1` | 100.50 (+0.6%) | 111.70 (+0.6%) | 122.80 (+0.5%) |
  | 250 W off | 99.95 | 111.10 | 122.20 |
  | 250 W `STRATA_GR_NORM_FAST=1` | 100.45 (+0.5%) | 111.65 (+0.5%) | 122.85 (+0.5%) |

  Per start (English / Japanese / code): 170 W on 100.5 / 111.7 / 122.8 twice, off 99.9 / 111.0 / 122.1 and 99.9 / 111.0 / 122.2;
  250 W on 100.5 / 111.7 / 122.9 and 100.4 / 111.6 / 122.8, off 100.0 / 111.2 / 122.3 and 99.9 / 111.0 / 122.1.
  The two starts of a setting are within 0.2 tok/s, and every start with the variable is above every start without it.
- Replies: identical bit for bit per question in all 72 requests (8 starts x 9), on and off alike.
  MTP drafts accepted / drafted (the 9 requests of one start): 2,712 / 3,448 in all 8 starts.

Rechecked on main at `ed4773e` (271 commits after `a0116b2`) with the same two commits cherry-picked onto it: it builds, `gr_parity` reports `gr_parity OK` on both cards with the variable unset and `=1`, and decode (one run each way, 170 W, `--spec-min-p 0.5`, mean of the three short questions over two repetitions) is 112.6 tok/s with the variable and 112.1 without (+0.4%).

## Extra Notes

- It could be on by default for sm_70; we kept it opt-in because we could measure Volta only.
- Disclosure: the change and this text were prepared with an AI assistant (Claude); the numbers are from runs on the machine above.

🤖 Generated with [Claude Code](https://claude.com/claude-code)