#1779 Add opt-in accepted-token adaptive cache barriers

Descripción

Holds expert placement fixed within each accepted-token block, counts accepted routing only, and drains/verifies commits before blocking swaps at the boundary. Rejected draft and speculative rows do not count. Pipelining continues inside each block; the default path stays off.

Refreshed onto current main `61b3fb5d`. A positive `STRATA_ADAPT_BARRIER_TOKENS` now resolves blocking adaptation before three-stage pipeline admission. Previously current main disabled the pipeline before the later async override.

Fresh three-P4 / ISTA IQ3_XXS / int8-KV validation: four 30-request matrices pass exact output/finish and accepted-routing/residency-hash comparisons, using intervals 64/17 and swap limits 80/160, with and without the CPU dispatch fix. Serial, pipeline, forced rollback, no-guess and serial-repeat arms follow the same ordered request history. Twelve current-main-versus-feature-off comparisons pass too. CUDA/HIP/SYCL builds pass; HIP/SYCL model execution is not claimed.

Exact comparisons explicitly set `STRATA_IQ_MT_MIN=1` and `STRATA_ROUTE_TAIL_SKIP=0`. Ordinary rank-7 routing can change target contributions with draft-window composition; two same-binary negative-control matrices remain published. Adaptive repeats are compared at matching request histories using #1813's explicit mode; original static audits remain visible. The barrier does not change ordinary tail-skip defaults.

Requires serve mode, a layer split, no PCIe miss sharing and positive adaptive settings. Barrier value unset/0 keeps the existing path. The interval replaces the window-based cadence and forces blocking adaptation even if async was requested. Unsupported remote/helper modes are refused. No fresh universal speedup or arbitrary numerical/quality guarantee is claimed.

[Fresh full outputs, manifests, profile, hashes, coverage, build evidence and limits](https://github.com/CC-David-CC/Strata-a5500/blob/81f000d1/bench/results/2026-10-11-accepted-token-barriers/README.md).