#1765 docs: Intel Arc A770 decode speed investigation record

Description

## Summary
Adds `docs/A770_SPEED_SPEC.md`, the measured record of an investigation into why Qwen3.8-Flash-Next (Coder IQ1_M) decodes slowly on an Intel Arc A770 in the SYCL port. It is a document only (no code change): the point is to save the next person the work of retrying the same experiments.

## What it records
- **Baseline:** ~12 tok/s decode (546-token prompt, 256 generated), warm, on this A770 (`xe`, PCIe 3.0 x4).
- **Bottleneck (measured):** the decode window is ~87% the per-layer CPU expert-pool handoff (`waitA`/`waitB`/`copy+combine`), and `gputop` shows the GPU only ~20% busy — decode is not GPU-bound. The expert kernel (~24 ms/window) and hyper-connection read (~7 ms) are minor.
- **Every lever tried, with its result:** spec window width, `--spec-min-p`, `--spec-split`, `--pool-workers`, expert-cache size, `--adapt-swaps`, `--pcie-frac`, GRF size, grouped-expert lanes, the MMVF rows path, `--kv q4_0`. All null or worse.
- **The one lever that could help and why it is blocked:** holding all ~19 GB of experts resident across the A770 + a second Arc via `--layer-split` loads ideally (97.5% of routed mass resident, "zero-doorbell graph") but crashes because the port's command-graph capture is single-context and a two-device split has two SYCL contexts (`verify.cpp:1706`). `--peer-device` is stubbed for SYCL.
- A note on the SYCL profiling situation (`STRATA_VERIFY_PROFILE`/`EAGER` both fail with `payload never arrived whole`).

## Extra Notes
Every number names its configuration and what it was measured on. The document is deliberately a record, including the rejected experiments, so it is long; it is not a proposal.